Overview
At Microsoft Quantum, we aim to empower science and scientists to solve the world's biggest problems by realizing advanced computing platforms at the intersection of high-performance computing, artificial intelligence, and quantum information technology. Our team is dedicated to developing the first scalable, fault-tolerant quantum computer and is leading progress in areas ranging from quantum hardware and error correction to comprehensive integration with Azure. Our full-stack strategy spans the physics of quantum devices through scalable readout and control infrastructures powered by cryo-electronics. We are entering a pivotal phase of accelerated growth in quantum computing, and this position presents a unique opportunity to contribute meaningfully to a transformative technology.
As a Principal Analog & CAD Engineer in the Quantum 1st Party Hardware System-on-a-Chip team, you will play a critical leadership role in advancing the development of Microsoft's quantum ASIC Foundry Interface and CAD Tool/Flow setup. Your responsibilities will include interfacing and establishing relationships with internal/external foundries, and creation of library Process-Development-Kits & CAD Flows for Cryo/Quantum System-on-a-Chip implementation. It also includes Analog Design Responsibilities and Analog Layout path-finding.
Throughout the program lifecycle, you will engage with cross-functional teams-including architecture, quantum, verification, analog, physical design and vendors -to ensure that the design meets specifications and is successfully implemented and verified. This role requires proficiency and technical competency, communication skills, and the ability to manage complex design challenges in a collaborative environment.
Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
Responsibilities
Responsible for auditing external foundries to find a suitable partner for long-term engagement for Microsoft quantum/cryo silicon programs. Evaluate their solutions for materials/process tailoring to match our needs. Create long-term evolution plans with vendors for evolving process needs for future quantum products.
Responsible for finding / defining design development libraries and re-characterizations for standard cells and analog design PDKs at cryo temperatures.
Responsible for setting CAD Tool flows for our ASICs in collaboration with a centralized CAD Infra tools team.
Responsible for Analog Design of cryo-CMOS components.
Responsible for Quantum/Cryo-CMOS layout solution path-finding.
Other
Embody our culture and values .
Qualifications
Required/minimum qualifications
Doctorate in Physics, Engineering, or related field AND 3+ years experience in industry or in a research and development environment
OR Master's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment
OR Bachelor's Degree in Physics, Engineering, or related field AND 8+ years experience in industry or in a research and development environment
OR equivalent experience.
Other Requirements:
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings:
Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR), the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status (e.g., under 8 U.S.C. § 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation).
Ability to work in an "AI-first" environment using modern AI tools to accelerate discovery through hardware development.
Preferred qualifications
9+ years of technical engineering experience with a BSEE or higher in Electrical Engineering (or related field), including 5+ years setting up PDKs and/or analog CAD tool flows
PDK interfacing, installation, creation, and modification, including design component views and scaling PDKs/libraries for cryo temperatures
Understanding of technology process nodes, parameters, and libraries, with experience navigating custom requirements with silicon foundries
Setup and management of CAD flows and tools, including EDA tools from Cadence, Synopsys, and Siemens for device and IP study
Custom process and custom library development
SPICE model development
Complex analog design with automation and scripting, proficient with the latest mixed-signal design flows and tools
Understanding of analog layout solutions, sufficient for path-finding
Proficient coding in Python, Java, and C++ Experience leveraging and designing/optimizing AI/ML
Knowledge of DFT and DFM techniques
Effective communication, collaboration, and teamwork skills, with the ability to contribute to diverse and inclusive teams
Quantum Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800.00 - $274,800.00 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000.00 - $304,200.00 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations. (https://careers.microsoft.com/v2/global/en/accessibility.html)
